Printed wiring boards with their mounted circuit components together with their mounting frames are well known and have long provided an advantageous means for assembling in an organized and ordered fashion in an electronics system, large numbers of electrical circuits. Generally, such boards have been adapted to carry integrated circuit chips as well as larger circuit components such as those referred to as dual, in-line circuit packs. In the past, when circuit chips are to be mounted on the board, the chip is first mounted on a chip carrier which is then electrically connected to the board wiring, either by means of terminal pins inserted in board sockets or by leads soldered to the board wiring. The socket or leads provide the compliance necessary to prevent solder joint failures which may result from excessive stresses produced when the board is flexed either in manufacture or use, for example. Such stresses may also be applied by the differential expansion of the epoxy-glass board substrate and the ceramic material of the chip carrier when the board assembly is temperature cycled in normal use.
A conventional printed wiring board also presents varying degrees of warp created either by manufacturing processes or as an inherent characteristic of the board raw material. As a result, when a warped, assembled printed wiring board is inserted in its mounting frame, it may be forcibly straightened thereby causing relatively large stresses to be applied to the electrical connections of the components mounted on the board. Too, craftspersons may attempt the manual straightening of a warped board before inserting it in its frame, thereby bringing about the same stresses on the electrical connections. In these circumstances, as one approach to the problem, chip carrier leads and sockets have also, in the past, provided the required compliance with these stresses to prevent damage to the electrical connections.
Another approach to the compliance problem in the past has been to apply a small pillar or pedestal of solder to each of the terminal pads of the chip carrier. When the carrier is subsequently mounted on the printed wiring board in a suitable solder flux and the pillars reflowed, a solder connection is formed which is relied upon to absorb the aforementioned stresses. This approach has its own disadvantages. The control of the solder reflow required to produce acceptable pillars has been difficult to achieve. The application of the solder pillars also adds significantly to the cost of the chip carrier. Further, because the melting point of the solder is lower than the temperature required for the sealing operation of the chip carrier, the solder application can only be accomplished during device manufacture at some time after the sealing operation. This adds further to the cost of the fabrication of the chip carrier since completed batches of the carrier would be discarded in the event of a single defective solder application.
It is thus an objective of the printed wiring board construction of the invention to provide a new and novel circuit chip mounting arrangement for achieving stress compliance directed to the foregoing and other problems.